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Products > Cable > DTI Client Reference Design Kit

DTI Client Reference Design Kit

DTI Client Reference Design Kit provides everything needed to allow a hardware designer to successfully integrate a fully compliant DTI client onto a PC board (typically one that contains other functionality, but it could be a stand-alone DTI client).

The following are the key features and benefits associated with the DTI Clients Reference Design Kit:

Compliance with DOCSIS Timing Interface Specifications
(CM-SP-DTI-I01-050805), including:
- Physical layer requirements
- RJ-45 physical interconnect
- Electrical characteristics
- Implementation of protocol
- Support for operating characteristics
- Support for DTI Status LED(s)
- Loop filter bandwidth and pull-in range
- Implementation of all operational states
- Support for DTI Client Test Port. This includes 10.24 MHz LVDS clock, 10 kHz LVTTL frame clock, and DTI frame serialized data (LVTTL).
Support for 1PPS test port
Provision for an optional second DTI connection port. This supports the possibility of having a client with redundant connections to DTI servers.
Provision for an optional external 10 MHz connection that can provide improved free-run stability compared with the stand-alone DTI client.
A register map for reading and setting various types of information relating to status of the DTI link and client behavior. I2C protocol is implemented to support reading from and writing to this register map.
An 8 kHz LVTTL square-wave output aligned with rising edge of 1PPS output.
Timestamp Synchronization output pulse that can be used to synchronize a customer-provided DTI timestamp value (written into the register map by customer) with a DTI timestamp value received via DTI link. When the two values are equal, a pulse is generated. See TS_SYNC in FPGA User Pin Assignments table.
JTAG header for FPGA programming.